GB/T 44791-2024

Active

Integrated circuit 3D packaging—Requirement for bumping-wafer-thining process and evaluation

集成电路三维封装 带凸点圆片减薄工艺过程和评价要求

Standard Type
GBT
ICS
31.200
CCS
L55
Status
Active
Issue Date
2024-10-26
Implementation
2025-05-01
Centralized Committee
工业和信息化部(电子)
Issuing Authority
国家市场监督管理总局、国家标准化管理委员会

Application Summary AI generated

This standard specifies the process requirements and evaluation methods for thinning wafers that already have bumps (bumping-wafer) in 3D integrated circuit packaging. It is applied in semiconductor manufacturing to ensure mechanical integrity and electrical performance during wafer thinning, a critical step for stacking multiple chips in high-density 3D packages. The standard is used by IC packaging foundries and quality assurance teams to control process parameters and assess thinning quality.

Related Standards

Transparency note: The application summary and key sentences on this page were automatically generated by AI from the standard's original text. This content has not been human-verified and should not be used for compliance or regulatory purposes. Always refer to the official standard document from the issuing authority.