GB/T 15877-2013

Active

Semiconductor integrated circuits—Specification of DIP leadframes produced by etching

半导体集成电路 蚀刻型双列封装引线框架规范

Standard Type
GBT
ICS
31.200
CCS
L56
Status
Active
Issue Date
2013-12-31
Implementation
2014-08-15
Centralized Committee
工业和信息化部(电子)
Issuing Authority
工业和信息化部(电子)

Application Summary AI generated

This standard specifies the technical requirements, test methods, inspection rules, and marking for dual in-line package (DIP) leadframes produced by the etching process. It is applied in the manufacturing and quality control of semiconductor integrated circuits, specifically for DIP leadframes used in electronic devices. The standard ensures dimensional accuracy, material properties, and reliability for leadframes in consumer electronics, automotive systems, and industrial equipment.

Related Standards

Transparency note: The application summary and key sentences on this page were automatically generated by AI from the standard's original text. This content has not been human-verified and should not be used for compliance or regulatory purposes. Always refer to the official standard document from the issuing authority.